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методика выполнения заводских приемочных испытаний комплексной РСУ/САО

ESD System Logic check / Verification

1. Check the initial functional status of logic upon SCS startup.
2. Normalize all inputs with simulation signals by the software simulation tool and reset logic to energize output(s) in the case of De-energize to trip logic. (In case of Energize to trip logic, the outputs are de-energized when normalized)
3. Simulate trip condition for a trip input signal using the software simulation tool.
4. Check output trip status, appropriate alarm messages, etc.
5. Normalize and Repeat test for all trip inputs one after another.
6. Check Bypass functions and abnormal situations (Fault conditions).
7. Check the status on Interlock and process Graphics.
8. Voted logic configuration is as per identified Safety Analysis Function Evaluation (SAFE) charts as per requirements in client SRS/SVP.
9. Check if SR and RS blocks are chosen correctly. The trip condition should always have a higher priority than the reset of that trip.
10. The results of the Cross-reference check should be checked for secondary write actions on variables